Datasheet KSZ8775CLX (Microchip) - 8

ManufacturerMicrochip
DescriptionIntegrated 5–Port 10/100 Managed Ethernet Switch with Port 4 RMII and Port 5 RGMII/MII/ RMII Interfaces
Pages / Page132 / 8 — KSZ8775CLX
File Format / SizePDF / 2.3 Mb
Document LanguageEnglish

KSZ8775CLX

KSZ8775CLX

Model Line for this Datasheet

Text Version of Document

KSZ8775CLX
TABLE 2-1: SIGNALS (CONTINUED) Num Pins Pin Name 30 TXC4/REFCLKI4 Type I/O Port Pin Description 4 Port 4 Switch MAC4 SW4-RMII Reference
Clock Input
RMII: Input for receiving 50 MHz clock in normal
mode. 31 RXC4 I/O 4 Port 4 Switch MAC4 SW4-RMII reference clock
out:
RMII: Output 50 MHz reference clock for the
receiving/transmit in the clock mode. 32 TXEN5/
TXD5_CTL IPD 5 MII/RMII: Port 5 switch transmit enable.
RGMII: Transmit data control. 33 TXD5_0 IPD 5 RGMII/MII/RMII: Port 5 switch transmit bit [0]. 34 TXD5_1 IPD 5 RGMII/MII/RMII:
Port 5 switch transmit bit [1]. 35 GNDD GND 36 VDDIO P 37 38 TXD5_2 TXD5_3 IPD IPD 39 TXER5 IPD 40 NC NC 41 GNDD GND 42 RXD4_1 IPD/O DS00002129C-page 8 Digital ground.
3.3V, 2.5V, or 1.8V digital VDD for digital I/O circuitry. 5 RGMII/MII:
Port 5 switch transmit bit [2].
RMII:
No connection. 5 RGMII/MII:
Port 5 switch transmit bit [3].
RMII:
No connection. 5 MII:
Port 5 switch transmit error.
RGMII/RMII:
No connection.
No connect
Digital ground 4 RMII:
Port 4 SW4-RMII receive bit [1]  2015 Microchip Technology Inc.