KSZ8775CLX TABLE 2-1: Num Pins 54 55 56 57 58 59 SIGNALS (CONTINUED) Pin Name RXD5_3 RXDV5/CRSDV5 /RXD5_CTL RXER5 CRS5 COL5 REFCLKO Type IPD/O IPD/O IPD/O IPD/O IPD/O PME_N I/O 61 GNDD GND 62 TXEN4 IPD Pin Description 5 RGMII/MII: Port 5 switch receive bit [3] RMII: No connection. 5 MII: RXDV5 is for Port 5 switch MII receiving data valid. RMII: CRSDV5 is for Port 5 RMII carrier sense/receive data valid output. RGMII: RXD5_CTL is for Port 5 RGMII receiving data control. 5 MII: Port 5 switch receive error. RGMII/RMII: No connection. 5 MII: Port 5 switch MII modes carrier sense. RGMII/RMII: No connection. 5 MII: Port 5 Switch MII collision detect. RGMII/RMII: No connection. 25 MHz clock output (Option) Controlled by the strap pin LED2_0. Default is enabled; it is better to disable it if not using it. IPU/O 60 DS00002129C-page 10 Port Power Management Event This output signal indicates that a wake-on-LAN event has been detected as a result of a wake-up frame detection. The KSZ8775CLX is requesting the system to wake up from low power mode. Its assertion polarity is programmable with the default polarity set to active low. Digital ground 4 RMII: Port 4 switch SW4-RMII transmit enable. 2015 Microchip Technology Inc.