Preliminary Datasheet ADAR1000 (Analog Devices)

ManufacturerAnalog Devices
Description4 Channel X/Ku Band Beamformer
Pages / Page51 / 1 — 4 Channel X/Ku Band Beamformer. Preliminary Technical Data. ADAR1000. …
RevisionPrF
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4 Channel X/Ku Band Beamformer. Preliminary Technical Data. ADAR1000. FEATURES. GENERAL DESCRIPTION

Preliminary Datasheet ADAR1000 Analog Devices, Revision: PrF

Text Version of Document

4 Channel X/Ku Band Beamformer Preliminary Technical Data ADAR1000 FEATURES GENERAL DESCRIPTION 8 GHz to 16 GHz frequency range
The ADAR1000 is a 4-channel X/Ku frequency band
Half-duplex for TX and RX modes
beamforming core chip for phased arrays. This device operates
Single pin Transmit/Receive control
in half-duplex: in Receive (RX) mode the four RX inputs are
360° phase control, 2.8 degree phase resolution
combined to a common RF_IO pin, and in TX mode the RF_IO
31 dB gain control, ≤0.5 dB resolution
signal is split into the 4 TX channels. In both modes, the
Bias and control for external T/R modules
ADAR1000 provides 31dB of gain control and full 360 deg. of
Memory for 121 pre-stored beam positions
phase control in the RF path, with better than 6-bit resolution
Four 30 dB range Power Detector
(less than 0.5 dB and 2.8 deg. respectively).
Integrated Temperature Sensor
Control of all the on-chip registers is through a simple 4-wire
8-Bit ADC for power detectors and temperature sensor
Serial Programming Interface (SPI). In addition, there are two
Programmable Bias Modes
address pins to allow software selection of one out of four core
4 wire ADI SPI Interface
chips on the same serial lines. Additionally, dedicated TX and
APPLICATIONS
RX load pins provides synchronization of all core chips in the
Phased Array Radar
same array, and a single TR pin enables very fast switching
Satellite Communications Systems
between transmit and receive modes. The ADAR1000 comes in a compact 88 pin, 7 mm × 7 mm LGA package.
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
Rev. PrF Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. No license is granted by implication or otherwise under any patent or patent rights of Analog Tel: 781.329.4700 ©2018 Analog Devices, Inc. All rights reserved. Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline Features Applications General Description Functional Block Diagram Specifications Timing Specifications Timing Diagram SPI Block Write Mode Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Changes from Previous Silicon Revision T/R switch driver output External PA and LNA bias DACs Eliminated the -3.3V supply input to the chip New PA_ON input pin Applications Gain Control Registers Switched Attenuator Control TR_SW_POS and TR_SW_NEG (T/R Switch Control) TX/RX Subcircuit Control TR_SOURCE = 0 SPI Programming Example Register Maps Address: 0x000, Reset: 0x00, Name: INTERFACE_CONFIG_A Outline Dimensions