Datasheet ADP2381 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 20 V, 6 A Synchronous Step-Down Regulator with Low-Side Driver |
| Pages / Page | 28 / 9 — Data Sheet. ADP2381. 11.0. 10.5. D ( L. 10.0. HRE. N O. 9.5. IM L. 9.0. … |
| File Format / Size | PDF / 857 Kb |
| Document Language | English |
Data Sheet. ADP2381. 11.0. 10.5. D ( L. 10.0. HRE. N O. 9.5. IM L. 9.0. AK CURRE. 8.5. E P. 8.0. –40. 120. –20. 100. TEMPERATURE (°C). CH1 5.00V. CH2 5.00V
Model Line for this Datasheet
Text Version of Document
Data Sheet ADP2381 70 11.0 A) 10.5 60 D ( L HO Ω) S 10.0 (m 50 HRE N O T DS IT 9.5 R IM L ET 40 NT SF 9.0 MO 30 AK CURRE 8.5 E P 20 8.0 –40 120
016
–20 0 20 40 60 80 100 –40 120
019
–20 0 20 40 60 80 100 TEMPERATURE (°C)
10209-
TEMPERATURE (°C)
10209- Figure 16. MOSFET RDSON vs. Temperature Figure 19. Current-Limit Threshold vs. Temperature
SW SW 1 1 LD LD 2 2
017 020
CH1 5.00V CH2 5.00V M20.0ns A CH2 3.70V CH1 5.00V CH2 5.00V M20.0ns A CH2 3.70V T 46.60%
10209-
T 43.80%
10209- Figure 17. Low-Side Driver Rising Edge Waveform, CDL = 2.2 nF Figure 20. Low-Side Driver Falling Edge Waveform, CDL = 2.2 nF
VOUT (AC) 1 EN/SS I 3 L VOUT 1 SW PGOOD 2 4 IOUT 2 4
018 021
CH1 10mV B CH2 10V B W M2.00µs A CH2 6.00V CH1 2.00V CH2 5.00V M2.00ms A CH2 5.80V CH4 2A Ω W T 50.00% CH3 5.00V CH4 5.00A Ω
10209-
T 50.00%
10209- Figure 18. Working Mode Waveform Figure 21. Soft Start with Ful Load Rev. 0 | Page 9 of 28 Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Schematic of Design Example External Components Recommendation Circuit Board Layout Recommendations Typical Application Circuits Outline Dimensions Ordering Guide
016
–20 0 20 40 60 80 100 –40 120
019
–20 0 20 40 60 80 100 TEMPERATURE (°C)
10209-
TEMPERATURE (°C)
10209- Figure 16. MOSFET RDSON vs. Temperature Figure 19. Current-Limit Threshold vs. Temperature
SW SW 1 1 LD LD 2 2
017 020
CH1 5.00V CH2 5.00V M20.0ns A CH2 3.70V CH1 5.00V CH2 5.00V M20.0ns A CH2 3.70V T 46.60%
10209-
T 43.80%
10209- Figure 17. Low-Side Driver Rising Edge Waveform, CDL = 2.2 nF Figure 20. Low-Side Driver Falling Edge Waveform, CDL = 2.2 nF
VOUT (AC) 1 EN/SS I 3 L VOUT 1 SW PGOOD 2 4 IOUT 2 4
018 021
CH1 10mV B CH2 10V B W M2.00µs A CH2 6.00V CH1 2.00V CH2 5.00V M2.00ms A CH2 5.80V CH4 2A Ω W T 50.00% CH3 5.00V CH4 5.00A Ω
10209-
T 50.00%
10209- Figure 18. Working Mode Waveform Figure 21. Soft Start with Ful Load Rev. 0 | Page 9 of 28 Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Schematic of Design Example External Components Recommendation Circuit Board Layout Recommendations Typical Application Circuits Outline Dimensions Ordering Guide
