Datasheet EFR32MG22 (Silicon Labs) - 10
| Manufacturer | Silicon Labs |
| Description | Wireless Gecko SoC Family |
| Pages / Page | 101 / 10 — 3.5.2 Low Energy Timer (LETIMER). 3.5.3 Real Time Clock with Capture … |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
3.5.2 Low Energy Timer (LETIMER). 3.5.3 Real Time Clock with Capture (RTCC). 3.5.4 Back-Up Real Time Counter
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EFR32MG22 Wireless Gecko SoC Family Data Sheet System Overview
3.5.2 Low Energy Timer (LETIMER)
The unique LETIMER is a 24-bit timer that is available in energy mode EM0 Active, EM1 Sleep, EM2 Deep Sleep, and EM3 Stop. This allows it to be used for timing and output generation when most of the device is powered down, allowing simple tasks to be performed while the power consumption of the system is kept at an absolute minimum. The LETIMER can be used to output a variety of wave- forms with minimal software intervention. The LETIMER is connected to the Peripheral Reflex System (PRS), and can be configured to start counting on compare matches from other peripherals such as the RTCC.
3.5.3 Real Time Clock with Capture (RTCC)
The Real Time Clock with Capture (RTCC) is a 32-bit counter providing timekeeping down to EM3. The RTCC can be clocked by any of the on-board low-frequency oscillators, and it is capable of providing system wake-up at user defined intervals. A secondary RTC is used by the RF protocol stack for event scheduling, leaving the primary RTCC block available exclusively for appli- cation software.
3.5.4 Back-Up Real Time Counter
The Back-Up Real Time Counter (BURTC) is a 32-bit counter providing timekeeping in all energy modes, including EM4. The BURTC can be clocked by any of the on-board low-frequency oscillators, and it is capable of providing system wake-up at user defined inver- vals.
3.5.5 Watchdog Timer (WDOG)
The watchdog timer can act both as an independent watchdog or as a watchdog synchronous with the CPU clock. It has windowed monitoring capabilities, and can generate a reset or different interrupts depending on the failure mode of the system. The watchdog can also monitor autonomous systems driven by the Peripheral Reflex System (PRS).
3.6 Communications and Other Digital Peripherals 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
The Universal Synchronous/Asynchronous Receiver/Transmitter is a flexible serial I/O module. It supports full duplex asynchronous UART communication with hardware flow control as well as RS-485, SPI, MicroWire and 3-wire. It can also interface with devices sup- porting: • ISO7816 SmartCards • IrDA • I2S
3.6.2 Enhanced Universal Asynchronous Receiver/Transmitter (EUART)
The Enhanced Universal Asynchronous Receiver/Transmitter supports full duplex asynchronous UART communication with hardware flow control, RS-485 and IrDA support. In EM0 and EM1 the EUART provides a high-speed, buffered communication interface. When routed to GPIO ports A or B, the EUART may also be used in a low-energy mode and operate in EM2. A 32.768 kHz clock source allows full duplex UART communication up to 9600 baud.
3.6.3 Inter-Integrated Circuit Interface (I2C)
The I2C module provides an interface between the MCU and a serial I2C bus. It is capable of acting as both a master and a slave and supports multi-master buses. Standard-mode, fast-mode and fast-mode plus speeds are supported, allowing transmission rates from 10 kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also available, allowing implementation of an SMBus-compliant system. The interface provided to software by the I2C module allows precise timing control of the transmission process and highly automated trans- fers. Automatic recognition of slave addresses is provided in active and low energy modes. Note that not all instances of I2C are avalia- ble in all energy modes.
silabs.com
| Building a more connected world. Preliminary Rev. 0.5 | 10 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Radio 3.2.1 Antenna Interface 3.2.2 Fractional-N Frequency Synthesizer 3.2.3 Receiver Architecture 3.2.4 Transmitter Architecture 3.2.5 Packet and State Trace 3.2.6 Data Buffering 3.2.7 Radio Controller (RAC) 3.2.8 RFSENSE Interface 3.3 General Purpose Input/Output (GPIO) 3.4 Clocking 3.4.1 Clock Management Unit (CMU) 3.4.2 Internal and External Oscillators 3.5 Counters/Timers and PWM 3.5.1 Timer/Counter (TIMER) 3.5.2 Low Energy Timer (LETIMER) 3.5.3 Real Time Clock with Capture (RTCC) 3.5.4 Back-Up Real Time Counter 3.5.5 Watchdog Timer (WDOG) 3.6 Communications and Other Digital Peripherals 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) 3.6.2 Enhanced Universal Asynchronous Receiver/Transmitter (EUART) 3.6.3 Inter-Integrated Circuit Interface (I2C) 3.6.4 Peripheral Reflex System (PRS) 3.6.5 Pulse Density Modulation (PDM) Interface 3.7 Security Features 3.7.1 Secure Boot with Root of Trust and Secure Loader (RTSL) 3.7.2 Cryptographic Accelerator 3.7.3 True Random Number Generator 3.7.4 Secure Debug with Lock/Unlock 3.8 Analog 3.8.1 Analog to Digital Converter (IADC) 3.9 Power 3.9.1 Energy Management Unit (EMU) 3.9.2 Voltage Scaling 3.9.3 DC-DC Converter 3.9.4 Power Domains 3.10 Reset Management Unit (RMU) 3.11 Core and Memory 3.11.1 Processor Core 3.11.2 Memory System Controller (MSC) 3.11.3 Linked Direct Memory Access Controller (LDMA) 3.12 Memory Map 3.13 Configuration Summary 4. Electrical Specifications 4.1 Electrical Characteristics 4.2 Absolute Maximum Ratings 4.3 General Operating Conditions 4.4 DC-DC Converter 4.4.1 DC-DC Operating Limits 4.5 Thermal Characteristics 4.6 Current Consumption 4.6.1 MCU current consumption using DC-DC at 3.0 V input 4.6.2 MCU current consumption at 3.0 V 4.6.3 MCU current consumption at 1.8 V 4.6.4 Radio current consumption at 3.0V using DCDC 4.7 Flash Characteristics 4.8 Wake Up, Entry, and Exit times 4.9 RFSENSE Low-energy Wake-on-RF 4.10 2.4 GHz RF Transceiver Characteristics 4.10.1 RF Transmitter Characteristics 4.10.1.1 RF Transmitter General Characteristics for the 2.4 GHz Band 4.10.1.2 RF Transmitter Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band 4.10.1.3 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 1 Mbps Data Rate 4.10.1.4 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 2 Mbps Data Rate 4.10.1.5 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 500 kbps Data Rate 4.10.1.6 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 125 kbps Data Rate 4.10.2 RF Receiver Characteristics 4.10.2.1 RF Receiver General Characteristics for the 2.4 GHz Band 4.10.2.2 RF Receiver Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band 4.10.2.3 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 1 Mbps Data Rate 4.10.2.4 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 2 Mbps Data Rate 4.10.2.5 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 500 kbps Data Rate 4.10.2.6 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 125 kbps Data Rate 4.11 Oscillators 4.11.1 High Frequency Crystal Oscillator 4.11.2 Low Frequency Crystal Oscillator 4.11.3 High Frequency RC Oscillator (HFRCO) 4.11.4 Fast Start_Up RC Oscillator (FSRCO) 4.11.5 Precision Low Frequency RC Oscillator (LFRCO) 4.11.6 Ultra Low Frequency RC Oscillator 4.12 GPIO Pins (3V GPIO pins) 4.13 Analog to Digital Converter (IADC) 4.14 Temperature Sense 4.15 Brown Out Detectors 4.15.1 DVDD BOD 4.15.2 LE DVDD BOD 4.15.3 AVDD and IOVDD BODs 4.16 PDM Timing Specifications 4.16.1 Pulse Density Modulator (PDM), Common DBUS 4.17 USART SPI Master Timing 4.17.1 SPI Master Timing, Voltage Scaling = VSCALE2 4.17.2 SPI Master Timing, Voltage Scaling = VSCALE1 4.18 USART SPI Slave Timing 4.18.1 SPI Slave Timing, Voltage Scaling = VSCALE2 4.18.2 SPI Slave Timing, Voltage Scaling = VSCALE1 4.19 I2C Electrical Specifications 4.19.1 I2C Standard-mode (Sm) 4.19.2 I2C Fast-mode (Fm) 4.19.3 I2C Fast-mode Plus (Fm+) 4.20 Typical Performance Curves 4.20.1 Supply Current 4.20.2 RF Characteristics 4.20.3 DC-DC Converter 5. Typical Connections 5.1 Power 5.2 RF Matching Networks 5.2.1 2.4 GHz Matching Network 5.3 Other Connections 6. Pin Definitions 6.1 QFN40 Device Pinout 6.2 TQFN32 Device Pinout 6.3 QFN32 Device Pinout 6.4 Alternate Function Table 6.5 Analog Peripheral Connectivity 6.6 Digital Peripheral Connectivity 7. QFN32 Package Specifications 7.1 QFN32 Package Dimensions 7.2 QFN32 PCB Land Pattern 7.3 QFN32 Package Marking 8. TQFN32 Package Specifications 8.1 TQFN32 Package Dimensions 8.2 TQFN32 PCB Land Pattern 8.3 TQFN32 Package Marking 9. QFN40 Package Specifications 9.1 QFN40 Package Dimensions 9.2 QFN40 PCB Land Pattern 9.3 QFN40 Package Marking 10. Revision History
3.5.2 Low Energy Timer (LETIMER)
The unique LETIMER is a 24-bit timer that is available in energy mode EM0 Active, EM1 Sleep, EM2 Deep Sleep, and EM3 Stop. This allows it to be used for timing and output generation when most of the device is powered down, allowing simple tasks to be performed while the power consumption of the system is kept at an absolute minimum. The LETIMER can be used to output a variety of wave- forms with minimal software intervention. The LETIMER is connected to the Peripheral Reflex System (PRS), and can be configured to start counting on compare matches from other peripherals such as the RTCC.
3.5.3 Real Time Clock with Capture (RTCC)
The Real Time Clock with Capture (RTCC) is a 32-bit counter providing timekeeping down to EM3. The RTCC can be clocked by any of the on-board low-frequency oscillators, and it is capable of providing system wake-up at user defined intervals. A secondary RTC is used by the RF protocol stack for event scheduling, leaving the primary RTCC block available exclusively for appli- cation software.
3.5.4 Back-Up Real Time Counter
The Back-Up Real Time Counter (BURTC) is a 32-bit counter providing timekeeping in all energy modes, including EM4. The BURTC can be clocked by any of the on-board low-frequency oscillators, and it is capable of providing system wake-up at user defined inver- vals.
3.5.5 Watchdog Timer (WDOG)
The watchdog timer can act both as an independent watchdog or as a watchdog synchronous with the CPU clock. It has windowed monitoring capabilities, and can generate a reset or different interrupts depending on the failure mode of the system. The watchdog can also monitor autonomous systems driven by the Peripheral Reflex System (PRS).
3.6 Communications and Other Digital Peripherals 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
The Universal Synchronous/Asynchronous Receiver/Transmitter is a flexible serial I/O module. It supports full duplex asynchronous UART communication with hardware flow control as well as RS-485, SPI, MicroWire and 3-wire. It can also interface with devices sup- porting: • ISO7816 SmartCards • IrDA • I2S
3.6.2 Enhanced Universal Asynchronous Receiver/Transmitter (EUART)
The Enhanced Universal Asynchronous Receiver/Transmitter supports full duplex asynchronous UART communication with hardware flow control, RS-485 and IrDA support. In EM0 and EM1 the EUART provides a high-speed, buffered communication interface. When routed to GPIO ports A or B, the EUART may also be used in a low-energy mode and operate in EM2. A 32.768 kHz clock source allows full duplex UART communication up to 9600 baud.
3.6.3 Inter-Integrated Circuit Interface (I2C)
The I2C module provides an interface between the MCU and a serial I2C bus. It is capable of acting as both a master and a slave and supports multi-master buses. Standard-mode, fast-mode and fast-mode plus speeds are supported, allowing transmission rates from 10 kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also available, allowing implementation of an SMBus-compliant system. The interface provided to software by the I2C module allows precise timing control of the transmission process and highly automated trans- fers. Automatic recognition of slave addresses is provided in active and low energy modes. Note that not all instances of I2C are avalia- ble in all energy modes.
silabs.com
| Building a more connected world. Preliminary Rev. 0.5 | 10 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Radio 3.2.1 Antenna Interface 3.2.2 Fractional-N Frequency Synthesizer 3.2.3 Receiver Architecture 3.2.4 Transmitter Architecture 3.2.5 Packet and State Trace 3.2.6 Data Buffering 3.2.7 Radio Controller (RAC) 3.2.8 RFSENSE Interface 3.3 General Purpose Input/Output (GPIO) 3.4 Clocking 3.4.1 Clock Management Unit (CMU) 3.4.2 Internal and External Oscillators 3.5 Counters/Timers and PWM 3.5.1 Timer/Counter (TIMER) 3.5.2 Low Energy Timer (LETIMER) 3.5.3 Real Time Clock with Capture (RTCC) 3.5.4 Back-Up Real Time Counter 3.5.5 Watchdog Timer (WDOG) 3.6 Communications and Other Digital Peripherals 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) 3.6.2 Enhanced Universal Asynchronous Receiver/Transmitter (EUART) 3.6.3 Inter-Integrated Circuit Interface (I2C) 3.6.4 Peripheral Reflex System (PRS) 3.6.5 Pulse Density Modulation (PDM) Interface 3.7 Security Features 3.7.1 Secure Boot with Root of Trust and Secure Loader (RTSL) 3.7.2 Cryptographic Accelerator 3.7.3 True Random Number Generator 3.7.4 Secure Debug with Lock/Unlock 3.8 Analog 3.8.1 Analog to Digital Converter (IADC) 3.9 Power 3.9.1 Energy Management Unit (EMU) 3.9.2 Voltage Scaling 3.9.3 DC-DC Converter 3.9.4 Power Domains 3.10 Reset Management Unit (RMU) 3.11 Core and Memory 3.11.1 Processor Core 3.11.2 Memory System Controller (MSC) 3.11.3 Linked Direct Memory Access Controller (LDMA) 3.12 Memory Map 3.13 Configuration Summary 4. Electrical Specifications 4.1 Electrical Characteristics 4.2 Absolute Maximum Ratings 4.3 General Operating Conditions 4.4 DC-DC Converter 4.4.1 DC-DC Operating Limits 4.5 Thermal Characteristics 4.6 Current Consumption 4.6.1 MCU current consumption using DC-DC at 3.0 V input 4.6.2 MCU current consumption at 3.0 V 4.6.3 MCU current consumption at 1.8 V 4.6.4 Radio current consumption at 3.0V using DCDC 4.7 Flash Characteristics 4.8 Wake Up, Entry, and Exit times 4.9 RFSENSE Low-energy Wake-on-RF 4.10 2.4 GHz RF Transceiver Characteristics 4.10.1 RF Transmitter Characteristics 4.10.1.1 RF Transmitter General Characteristics for the 2.4 GHz Band 4.10.1.2 RF Transmitter Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band 4.10.1.3 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 1 Mbps Data Rate 4.10.1.4 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 2 Mbps Data Rate 4.10.1.5 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 500 kbps Data Rate 4.10.1.6 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 125 kbps Data Rate 4.10.2 RF Receiver Characteristics 4.10.2.1 RF Receiver General Characteristics for the 2.4 GHz Band 4.10.2.2 RF Receiver Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band 4.10.2.3 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 1 Mbps Data Rate 4.10.2.4 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 2 Mbps Data Rate 4.10.2.5 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 500 kbps Data Rate 4.10.2.6 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 125 kbps Data Rate 4.11 Oscillators 4.11.1 High Frequency Crystal Oscillator 4.11.2 Low Frequency Crystal Oscillator 4.11.3 High Frequency RC Oscillator (HFRCO) 4.11.4 Fast Start_Up RC Oscillator (FSRCO) 4.11.5 Precision Low Frequency RC Oscillator (LFRCO) 4.11.6 Ultra Low Frequency RC Oscillator 4.12 GPIO Pins (3V GPIO pins) 4.13 Analog to Digital Converter (IADC) 4.14 Temperature Sense 4.15 Brown Out Detectors 4.15.1 DVDD BOD 4.15.2 LE DVDD BOD 4.15.3 AVDD and IOVDD BODs 4.16 PDM Timing Specifications 4.16.1 Pulse Density Modulator (PDM), Common DBUS 4.17 USART SPI Master Timing 4.17.1 SPI Master Timing, Voltage Scaling = VSCALE2 4.17.2 SPI Master Timing, Voltage Scaling = VSCALE1 4.18 USART SPI Slave Timing 4.18.1 SPI Slave Timing, Voltage Scaling = VSCALE2 4.18.2 SPI Slave Timing, Voltage Scaling = VSCALE1 4.19 I2C Electrical Specifications 4.19.1 I2C Standard-mode (Sm) 4.19.2 I2C Fast-mode (Fm) 4.19.3 I2C Fast-mode Plus (Fm+) 4.20 Typical Performance Curves 4.20.1 Supply Current 4.20.2 RF Characteristics 4.20.3 DC-DC Converter 5. Typical Connections 5.1 Power 5.2 RF Matching Networks 5.2.1 2.4 GHz Matching Network 5.3 Other Connections 6. Pin Definitions 6.1 QFN40 Device Pinout 6.2 TQFN32 Device Pinout 6.3 QFN32 Device Pinout 6.4 Alternate Function Table 6.5 Analog Peripheral Connectivity 6.6 Digital Peripheral Connectivity 7. QFN32 Package Specifications 7.1 QFN32 Package Dimensions 7.2 QFN32 PCB Land Pattern 7.3 QFN32 Package Marking 8. TQFN32 Package Specifications 8.1 TQFN32 Package Dimensions 8.2 TQFN32 PCB Land Pattern 8.3 TQFN32 Package Marking 9. QFN40 Package Specifications 9.1 QFN40 Package Dimensions 9.2 QFN40 PCB Land Pattern 9.3 QFN40 Package Marking 10. Revision History
