Datasheet AD8510, AD8512, AD8513 (Analog Devices) - 16

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AD8510/AD8512/AD8513 Date Sheet
Figure 45 shows a scope plot of the output of the AD8510/AD8512/
OPEN-LOOP GAIN AND PHASE RESPONSE
AD8513 in response to a 400 mV pulse. The circuit is configured in In addition to their impressive low noise, low offset voltage, and positive unity gain (worst case) with a load experience of 500 pF. offset current, the AD8510/AD8512/AD8513 have excellent loop gain and phase response even when driving large resistive
VSY = ±15V CL = 500pF
and capacitive loads.
RL =10kΩ
Compared with Competitor A (see Figure 48) under the same
) IV
conditions, with a 2.5 kΩ load at the output, the AD8510/AD8512/
/D V
AD8513 have more than 8 MHz of bandwidth and a phase margin
200m
of more than 52°.
( E G
Competitor A, on the other hand, has only 4.5 MHz of band-
LTA O
width and 28° of phase margin under the same test conditions.
V
Even with a 1 nF capacitive load in parallel with the 2 kΩ load at the output, the AD8510/AD8512/AD8513 show much better 1 04 9- response than Competitor A, whose phase margin is degraded 72 02 to less than 0, indicating oscillation.
TIME (1µs/DIV)
Figure 45. Capacitive Load Drive Without Snubber
70 315 VSY = ±15V
When the snubber circuit is used, the overshoot is reduced from
60 RL = 2.5kΩ 270 CL = 0pF
55% to less than 3% with the same load capacitance. Ringing is
50 225
virtually eliminated, as shown in Figure 46.
40 180 ) es) 30 135 B re VSY = ±15V d ( eg R D L = 10kΩ IN 20 90 ( C E L = 500pF GA R 10 45 S = 100Ω ) C HAS S = 1nF P IV 0 0 /D V –10 –45 200m ( –20 –90
043
GE
29-
–30 –135
270
LTA 10k 100k 1M 10M 50M O V FREQUENCY (Hz)
Figure 47. Frequency Response of the AD8510/AD8512/AD8513 2 -04 9 72 02
70 315 V TIME (1µs/DIV) SY = ±15V 60 RL = 2.5kΩ 270
Figure 46. Capacitive Load with Snubber Network
CL = 0pF 50 225
Optimum values for RS and CS depend on the load capacitance
40 180
and input stray capacitance and are determined empirically.
) es) 30 135
Table 5 shows a few values that can be used as starting points.
B re d ( eg D IN 20 90 ( E Table 5. Optimum Values for Capacitive Loads GA 10 45 HAS C P LOAD RS (Ω) CS 0 0
500 pF 100 1 nF
–10 –45
2 nF 70 100 pF
–20 –90
5 nF 60 300 pF 044 9-
–30 –135
272 0
10k 100k 1M 10M 50M FREQUENCY (Hz)
Figure 48. Frequency Response of Competitor A Rev. K | Page 16 of 21 Document Outline FEATURES APPLICATIONS PIN CONFIGURATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS GENERAL APPLICATION INFORMATION INPUT OVERVOLTAGE PROTECTION OUTPUT PHASE REVERSAL TOTAL HARMONIC DISTORTION (THD) + NOISE TOTAL NOISE INCLUDING SOURCE RESISTORS SETTLING TIME OVERLOAD RECOVERY TIME CAPACITIVE LOAD DRIVE OPEN-LOOP GAIN AND PHASE RESPONSE PRECISION RECTIFIERS I-V CONVERSION APPLICATIONS Photodiode Circuits Signal Transmission Applications Crosstalk OUTLINE DIMENSIONS ORDERING GUIDE