Datasheet 74LVC1G3157 (Nexperia)

ManufacturerNexperia
Description10 Ohm Single-Pole Double-Throw Analog Switch
Pages / Page22 / 1 — 74LVC1G3157. 10 Ohm single-pole double-throw analog switch. Rev. 10 — 13 …
File Format / SizePDF / 337 Kb
Document LanguageEnglish

74LVC1G3157. 10 Ohm single-pole double-throw analog switch. Rev. 10 — 13 April 2023. Product data sheet. 1. General description

Datasheet 74LVC1G3157 Nexperia

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74LVC1G3157 10 Ohm single-pole double-throw analog switch Rev. 10 — 13 April 2023 Product data sheet 1. General description
The 74LVC1G3157 is a single-pole double-throw analog switch with a digital select input (S), two independent inputs/outputs (Y0 and Y1) and a common input/output (Z). Control inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at control inputs makes the circuit tolerant of slower input rise and fall times.
2. Features and benefits
• Wide supply voltage range from 1.65 V to 5.5 V • Very low ON resistance: • 7.5 Ω (typical) at VCC = 2.7 V • 6.5 Ω (typical) at VCC = 3.3 V • 6 Ω (typical) at VCC = 5 V • 32 mA continuous switch current • Break-before-make switching • High noise immunity • CMOS low power dissipation • TTL interface compatibility at 3.3 V • Latch-up performance meets requirements of JESD 78 Class I • ESD protection: • HBM EIA/JESD22-A114-A exceeds 2000V • MM EIA/JESD22-A115-A exceeds 200V • Overvoltage tolerant control inputs to 5.5 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C Document Outline 1. General description 2. Features and benefits 3. Ordering information 4. Marking 5. Functional diagram 6. Pinning information 6.1. Pinning 6.2. Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 10.1. Test circuits 10.2. ON resistance 10.3. ON resistance test circuit and graphs 11. Dynamic characteristics 11.1. Waveforms and test circuits 11.2. Additional dynamic characteristics 11.3. Test circuits 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information Contents