Datasheet IKCM15F60GA (Infineon) - 6

Control Integrated POwer System (CIPOS™) IKCM15F60GA It is not recommended for proper work to provide VDD, VSS (Low side control supply and reference, input pulse-width lower than 1µs. Pin 13, 16) The integrated gate drive provides additionally a VDD is the control supply and it provides power shoot through prevention capability which avoids both to input logic and to output power stage. the simultaneous on-state of two gate drivers of the Input logic is referenced to VSS ground. same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and The under-voltage circuit enables the device to LO3). When two inputs of a same leg are activated, operate at power on when a supply voltage of at only former activated one is activated so that the least a typical voltage of V leg is kept steadily in a safe state. DDUV+ = 12.1V is present. The IC shuts down all the gate drivers power A minimum deadtime insertion of typically 380ns is outputs, when the VDD supply voltage is below also provided by driver IC, in order to reduce cross- V conduction of the external power switches. DDUV- = 10.4V. This prevents the external power switches from critically low gate voltage levels VFO (Fault-output and NTC, Pin 14) during on-state and therefore from excessive power The VFO pin indicates a module failure in case of dissipation. under voltage at pin VDD or in case of triggered VB(U, V, W) and VS(U, V, W) (High side supplies, Pin over current detection at ITRIP. A pull-up resistor is 1 - 6) externally required. VB to VS is the high side supply voltage. The high side circuit can float with respect to VSS following VDD CIPOSTM the external high side power device emitter voltage. RON,FLT From ITRIP - Latch VFO Due to the low power consumption, the floating 1 driver stage is supplied by integrated bootstrap VSS From UV detection Thermistor circuit. Figure 5 Internal circuit at pin VFO The under-voltage detection operates with a rising supply threshold of typical V The same pin provides direct access to the NTC, BSUV+ = 12.1V and a falling threshold of V which is referenced to VSS. An external pull-up BSUV- = 10.4V. resistor connected to +5V ensures that the resulting VS(U, V, W) provide a high robustness against voltage can be directly connected to the negative voltage in respect of VSS of -50V microcontroller. transiently. This ensures very stable designs even under rough conditions. ITRIP (Over current detection function, Pin 15) NW, NV, NU (Low side emitter, Pin 17 - 19) CIPOS™ provides an over current detection The low side emitters are available for current function by connecting the ITRIP input with the measurements of each phase leg. It is IGBT collector current feedback. The ITRIP recommended to keep the connection to pin VSS as comparator threshold (typ. 0.47V) is referenced to short as possible in order to avoid unnecessary VSS ground. An input noise filter (typ.: tITRIPMIN = inductive voltage drops. 530ns) prevents the driver to detect false over- current events. W, V, U (High side emitter and low side collector, Pin 20 - Over current detection generates a shutdown of all 22) outputs of the gate driver after the shutdown These pins are motor U, V, W input pins. propagation delay of typically 1000ns. P (Positive bus input voltage, Pin 23) The fault-clear time is set to minimum 40µs. The high side IGBTs are connected to the bus voltage. It is noted that the bus voltage does not exceed 450V. Datasheet 6 of 17 V 2.5 2017-09-06 Document Outline Table of contents CIPOS™ Control Integrated POwer System Features Target Applications Description System Configuration Pin Configuration Internal Electrical Schematic Pin Assignment Pin Description HIN(U, V, W) and LIN(U, V, W) (Low side and high side control pins, Pin 7 - 12) VFO (Fault-output and NTC, Pin 14) ITRIP (Over current detection function, Pin 15) VDD, VSS (Low side control supply and reference, Pin 13, 16) VB(U, V, W) and VS(U, V, W) (High side supplies, Pin 1 - 6) NW, NV, NU (Low side emitter, Pin 17 - 19) W, V, U (High side emitter and low side collector, Pin 20 - 22) P (Positive bus input voltage, Pin 23) Absolute Maximum Ratings Module Section Inverter Section Control Section Recommended Operation Conditions Static Parameters Dynamic Parameters Bootstrap Parameters Thermistor Mechanical Characteristics and Ratings Circuit of a Typical Application Switching Times Definition Electrical characteristic Package Outline Revision history