This timing diagram for two separate watchdog events shows the reset pulse being held off and not resetting the hardware for the first event and then a reset pulse that occurs after a predetermined delay for the second event
| Authors | Ken Turocy |
| Main Document | Article «LMC555 Timers Delay Hardware Reset To Collect Debug Data» |
| Description | Figure 2 |
| File Format / Size | PDF / 24 Kb |
| Document Language | English |
Other Materials from the Main Document
- Article «LMC555 Timers Delay Hardware Reset To Collect Debug Data»
- Figure 1. The first LMC555 detects the watchdog-overflow trigger from the microcontroller and provides a delay. The second LMC555 allows the firmware to disable the impending hardware reset
- Figure 2. This timing diagram for two separate watchdog events shows the reset pulse being held off and not resetting the hardware for the first event and then a reset pulse that occurs after a predetermined delay for the second event
