An input-level-versus-frequency plot of the RF-to-digital comparator measured from the RF source's reference plane to a clean logic output reveals less-than-100-mV sensitivity at 160 MHz and usable output to 200 MHz
| Authors | Francis Rodes |
| Main Document | Article «CMOS inverters convert RF to digital signal» |
| Description | Figure 3 |
| File Format / Size | PDF / 19 Kb |
| Document Language | English |
Other Materials from the Main Document
- Article «CMOS inverters convert RF to digital signal»
- Figure 1. Three high-speed CMOS inverters and a few passive components form an RF-to-logic converter
- Figure 3. An input-level-versus-frequency plot of the RF-to-digital comparator measured from the RF source's reference plane to a clean logic output reveals less-than-100-mV sensitivity at 160 MHz and usable output to 200 MHz
