Schematic diagram of wire break detector using CMOS memory cell (shown in broken box). If using the CD40106, only one gate is needed for the oscillator (Schmitt inputs). An additional gate can be put in series with the memory cell G5 and G6 to form a comp
Figure 2. Schematic diagram of wire break detector using CMOS memory cell (shown in broken box). If using the CD40106, only one gate is needed for the oscillator (Schmitt inputs). An additional gate can be put in series with the memory cell G5 and G6 to form a comp