Let’s see how you can effectively double the output sink current of the plain old 555 timer.
From the block diagram in Figure 1 taken from the datasheet of the ST’s TS555 low power single CMOS timer) we can see that the Discharge pin (pin 7) repeats the Output pin (pin 3). In reality, they are only in the “Low” state at the same time. This differs for the “High” state where the Output pin can produce a source current while the Discharge pin is of Open Drain (or Open Collector for old 555s).
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| Figure 1. | Block diagram of the TS555 lower power single CMOS timer. |
The circuit in Figure 2 combines the sink currents of both the Output and the Discharge pins, which allows us to double the output current. Resistors R3 and R4 are part of the load, they limit the sink current to a safe value.
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| Figure 2. | Circuit that combines the sink currents of the Output and Discharge pin of the, doubling the output current. |
The price for this doubling is some accuracy degradation: Now, the circuit is a bit more susceptible to the power voltage variations. Nevertheless, this downside accuracy a satisfactory tradeoff for many applications.
Now, let’s try to use the new circuit of the 555 for something useful. The measurement of a capacitor’s equivalent series resistance (ESR) may become a problem since the ESR can be very low, about tens of milliohms. Hence the current should be sufficiently high to measure it reliably. An application circuit for this is shown in Figure 3.
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| Figure 3. | Application circuit for measuring the ESR of a capacitor using the concept introduced in Figure 2. |
The circuit produces short (less than 1 µs) current pulses through the capacitor CX with a period of about 10 µs; the voltage drop on the capacitor (VESR) is proportional to its ESR. So, comparing this voltage drop with voltage (V) on R3, CX you can calculate the ESR:
or you can simply select the capacitor with the lowest ESR amongst several candidates.
