Famous analog designer and author Jim Williams published an awesome design in 1986 for a 100-MHz voltage to frequency converter (Ref. 1). He named this high-climber (picture it on the roof of the Empire State building swatting biplanes out of the air) King Kong! He followed Kong in 2005 with a significantly updated successor, “1-Hz to 100-MHz VFC features 160-dB dynamic range” (Ref. 2).
I was fascinated by both of these impressive designs because they were way faster than any other VFC I’d ever seen! Another two decades passed before I decided to try for a 9-digit VFC of my own.
Here’s the result (Figure 1).
 |
|
| Figure 1. | This simple VFC borrows some of Williams’ pioneering speed ideas and combines them with a few tricks of my own to reach the high altitude of a 100-MHz full scale frequency. |
The Q1, D1, and Schmitt trigger U1 make a sloppy but tight and speedy VFC which is then accurized by the feedback loop comprising prescaler U3, take-back-half (TBH) charge pump D1-D4 (Ref. 3), and integrator A1. The preaccumulator U2 interfaces the 100 MHz count rate to moderate speed (~6.25 MHz) counter timer peripherals without losing resolution.
The core of Figure 1’s circuit is a very simple Q1, U1, D5 ramp-reset oscillator. Q1’s collector current discharges the few picofarads of stray capacitance provided by its own collector, Schmitt trigger U1’s input, D5, and their interconnections (as short and direct as possible, please!). U1’s sub-five-nanosecond propagation delay allows the oscillation to run from a dead stop (possible due to leakage draining R4) to beyond 100 MHz.
During each cycle, when Q1 ramps U1 pin 2 down to its trigger level, U1 responds with a ~5 ns ramp reset feedback pulse through Schottky D5. This pulls pin 2 back above the positive trigger level and starts the next oscillation cycle. Because the ramp-down rate is (more or less) proportional to Q1’s base current, which is approximately proportional to integrator A1’s output voltage, oscillation frequency is likewise. The caveat is “approximately”.
The feedback through the TBH pump, summation with the R1 input at integrator A1’s noninverting input, the output to Q1 and thence to U1 pin 2 converts “approximately” to “accurately”. One item that lets this VFC work in Kong’s frequency domain but with a considerably simpler parts count is the self-compensating TBH diode charge pump described in an earlier design idea (DI): “Take-back-half precision diode charge pump” (Ref. 3)
So, what’s U3 doing?
The TBH pump’s self-compensation allows it to accurately dispense charge at 25 MHz or so but 100 MHz would definitely be asking too much. U3’s two-bit prescaler addresses this problem.U3 also provides an opportunity (note jumper J1) to substitute a high quality 5.000 V reference for the likely lesser accuracy of the generic 5 V rail.
Figure 2 shows a 250-kHz diode charge pump boosting the 5 V rail to about 8 V which is then regulated down to a precision 5.000 by U4. U3 current demand, including pump drive, is about 23 mA at 100 MHz; U4 isn’t rated for quite that heavy a load, so buddy resistor R6 takes up the slack.
 |
|
| Figure 2. | A 250-kHz diode charge pump Rail booster bringing rail to 8 V which is then regulated down to a precision 5.000 V reference by U4. |
The 16x preaccumulator U2 allows use of moderate performance counter-timer peripherals as slow as 6.25 MHz to acquire the full-scale 100-MHz VFC output. That idea is described in an earlier DI: “Preaccumulator handles VFC outputs that are too fast for a naked CTP to swallow” (Ref. 4).
References
- Williams, Jim. "Ultra-High Speed 1 Hz to 100 MHz V-F Converter."
- Williams, Jim. "1-Hz to 100-MHz VFC features 160-dB dynamic range."
- Woodward, Stephen. "Take-Back-Half precision diode charge pump."
- Woodward, Stephen. "Preaccumulator handles VFC outputs that are too fast for a naked CTP to swallow."
