Method provides self-timing for synchronous rectifiers

Synchronous rectifiers are MOSFETs, driven in such a way as to perform a rectifying function. They often take the place of diodes in the output-rectification stage of switching power converters, because of their lower on-state power loss. In power circuits, synchronous rectifiers are often complicated to use because of timing issues. Some techniques attempt to predict the correct timing by following the same drive signal that controls the main switching element of the circuit. Other techniques sense the current in the FET in various ways and then act on that information. Figures 1a and 1b show simplified representations of these alternative techniques, applied to the forward/buck topology. During the off-time of the main switch, the rectifier conducts from source to drain. At the beginning of the switching cycle, the main switch turns on and begins driving current into the rectifier. Eventually, the current in the rectifier falls to zero and begins to reverse, flowing from drain to source. This instant is the optimum time to turn off the rectifier.

These topologies often exhibit a delayed turn-off of the synchronous rectifier, resulting in considerable reverse current. The current-reversal timing depends on loading conditions (a). The zero-cross current causes the rectifier to turn off too late (b).
Figure 1. These topologies often exhibit a delayed turn-off of the synchronous rectifier, resulting in considerable
reverse current. The current-reversal timing depends on loading conditions (a). The zero-cross current
causes the rectifier to turn off too late (b).

Unfortunately, if the signal from the control circuit appears at this time, the synchronous rectifier turns off only after various delays (especially, the MOSFET's turn-off delay). Because a large di/dt is involved in the turn-off, the undesirable consequence is that the rectifier turns off only when considerable reverse current is flowing. If you use the concept in Figure 1a with a fixed delay, the turn-off of the synchronous rectifier rarely occurs at the optimum time, because the current-reversal timing depends on loading conditions. Adaptive-delay techniques that compensate for changes in delay with load are complex. The concept in Figure 1b has similar complications. The zero-cross current detector is often relatively slow, so, in addition to the cited FET delays, it causes the synchronous rectifier to turn off too late. Figure 2 shows a simple way to modify the concept in Figure 1b. In this case, you introduce a saturable core with an additional sense winding in the drain connection of the rectifier. With some minor additional circuitry, this single component accomplishes by itself the two main functions necessary to eliminate the turn-off-delay problem.

These topologies often exhibit a delayed turn-off of the synchronous rectifier, resulting in considerable reverse current. The current-reversal timing depends on loading conditions (a). The zero-cross current causes the rectifier to turn off too late (b).
Figure 2. A low-cost, saturable core in the drain circuit of the synchronous
rectifier introduces a “self-timing” feature in the circuit.

The first function is to determine the instant that the current falls close to zero. At that time, the core comes out of saturation and blocks voltage. This voltage also appears on the additional winding, flagging to the sense circuit that it must immediately turn off the MOSFET. The second function is to significantly slow the di/dt of the current during this crucial turn-off time. The saturable core's operation allows wider tolerances in timing and more flexibility in the design of the synchronous-rectifier driver, resulting in far fewer and less expensive components. The core can be small, even for high-power applications, and should be of nonsquare-loop ferrite material. Regular power ferrite is much less expensive and lossy than its square-loop counterparts. The nonsquare-loop material allows the core to come out of saturation when the current is still slightly positive in the rectifier, thus giving a slight advance warning.

Because of the nonlinear response of the saturable core, the secondary sense winding has far fewer turns than the corresponding linear sensor in Figure 1b and virtually no loss in the sensing and clamping circuits for its secondary current. These considerations improve response speed and reduce losses in the high-current outputs. Note that this simple circuit is versatile; you can apply it to various switches and rectifiers in most power-circuit topologies. The concept can even improve on well-known soft-switching techniques.

EDN