A novel LM317 topology enables control of amps of IOUT with just milliamps of IC, IOUT = (VADJ - (IC - IADJ)RC)/ RS - IC + IADJ ≈ (VADJAuthors Stephen Woodward Main Document Article «PWM-programmed LM317 constant current source» Description Figure 2 File Format / Size PDF / 7 Kb Document Language English
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- Article «PWM-programmed LM317 constant current source»
- Figure 1. Classic LM317 constant current source, IOUT = VADJ/RS + IADJ ≈ ≈ VADJ/RS = 1.25/RS
- Figure 2. A novel LM317 topology enables control of amps of IOUT with just milliamps of IC, IOUT = (VADJ - (IC - IADJ)RC)/ RS - IC + IADJ ≈ (VADJ
- Figure 3. The 1-A, 15-V, PWM-programmed grounded-load current source with a novel LM317 topology. The asterisked resistors are 1% or better and RS = 1.25 Ω
- Figure 4. IOUT versus D where D (x-axis) is the PWM duty factor and IOUT (y-axis) is VADJ/1.25 = 1 A full-scale = 1 - 2/(1 + 1/D)
- Figure 5. D versus IOUT where IOUT (x-axis) is 1 A full-scale and D (y-axis) = 1/(2/(1 - IOUT) - 1)
- Figure 6. C3 adds 2nd order PWM ripple filtering for ~500% faster settling time. Thanks go to frequent contributor Christopher R. Paul for the comment that suggested it
- Figure 7. Analog ripple subtraction (
- Figure 8. A contribution from frequent contributor Christopher R. Paul suggests improving PSRR with capacitor CC as well as making programming linear in D. For applications in which settling time isn't important, this is a useful modification. Thanks, Ch
- Figure 1. Classic LM317 constant current source, IOUT = VADJ/RS + IADJ ≈ ≈ VADJ/RS = 1.25/RS
- Figure 2. A novel LM317 topology enables control of amps of IOUT with just milliamps of IC, IOUT = (VADJ - (IC - IADJ)RC)/ RS - IC + IADJ ≈ (VADJ
- Figure 3. The 1-A, 15-V, PWM-programmed grounded-load current source with a novel LM317 topology. The asterisked resistors are 1% or better and RS = 1.25 Ω
- Figure 4. IOUT versus D where D (x-axis) is the PWM duty factor and IOUT (y-axis) is VADJ/1.25 = 1 A full-scale = 1 - 2/(1 + 1/D)
- Figure 5. D versus IOUT where IOUT (x-axis) is 1 A full-scale and D (y-axis) = 1/(2/(1 - IOUT) - 1)
- Figure 6. C3 adds 2nd order PWM ripple filtering for ~500% faster settling time. Thanks go to frequent contributor Christopher R. Paul for the comment that suggested it
- Figure 7. Analog ripple subtraction (
- Figure 8. A contribution from frequent contributor Christopher R. Paul suggests improving PSRR with capacitor CC as well as making programming linear in D. For applications in which settling time isn't important, this is a useful modification. Thanks, Ch
