On-chip losses vs. die area

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Other Materials from the Main Document

• Article «Maximize power density with three-level buck-switching chargers. Part 1»
• Figure 1. Two-level (2L) buck switches and gate drive
• Figure 2. Three-level (3L) buck switches and gate drive
• Figure 3. Three-level (3L) converter operation with D less than 0.5
• Figure 4. Three-level (3L) converter operation with D greater than 0.5
• Figure 5. On-chip losses vs. die area