12-Bit Incremental ADC Datasheet ADCINC12 V 5.3 (Cypress) - 5

ManufacturerCypress
DescriptionThe ADCINC12 User Module implements a 12-bit incremental A/D that generates a 12-bit, full-scale 2's complement output (+2047 to -2048 count range) with several input ranges to select from. Input voltage ranges, including rail-to-rail, may be measured by configuring the proper reference voltage and analog ground. It supports sample rates from 7.8 sps to 480 sps
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DC and AC Electrical Characteristics. Parameter. Typical. Limit. Units. Conditions and Notes

DC and AC Electrical Characteristics Parameter Typical Limit Units Conditions and Notes

Text Version of Document

12-Bit Incremental ADC Figure 3. Timer Cycles for the ADCINC12 Immediately at the start of timer cycle number 1, the counter is enabled. It stays enabled until the start of the reset cycle. During this reset period, the ADC value is calculated from the software and hardware counter values. This value is shifted right twice to compensate for the four times over clocking. The flag variable is set signifying that new data is available. Because the ACDINC12 control is interrupt based and the sample time is relatively long, it is unreasonable to expect the processor to wait while a sample is being processed. The primary communication between the ADC routine and the main program is a data-available flag that may be polled. APIs are available to check the data flag and retrieve data. The data handler was designed to be poll based. If an interrupt-based data handler is desired, application- specific data handler code can be added to the interrupt routine ADCINC12_TMR_ISR, located in the assembly file adcinc12INT.asm. The point to insert code is clearly marked.
DC and AC Electrical Characteristics
The following values are indicative of expected performance and based on initial characterization data. Unless otherwise specified in the following table, TA = 25°C, Vdd = 5.0V, Power HIGH, Op-Amp bias LOW, output referenced to 2.5V external Analog Ground on P2[4] with 1.25 external Vref on P2[6], sample rates of 100 sps, and a data clock of 1.66 MHz, unless otherwise noted. Table 1. 5.0V ADCINC12 DC and AC Electrical Characteristics
Parameter Typical Limit Units Conditions and Notes
Input Input Voltage Range --- Vss to Vdd Ref Mux = Vdd/2 ± Vdd/2 Input Capacitance1 3 -- pF Input Impedance 1/(C*Clk) -- Ω Resolution -- 12 Bits Sample Rate -- 7.8 to 480 sps SNR 71 -- dB DC Accuracy INL 1.0 -- LSB DNL 0.5 -- LSB Document Number: 001-13252 Rev. *H Page 5 of 23 Document Outline Features and Overview Functional Description Example 1 Example 2 Incremental ADC DC and AC Electrical Characteristics CY8C29xxx Typical Performance Placement Parameters and Resources Example 1 Example 2 Interrupt Generation Control Application Programming Interface ADCINC12_Start ADCINC12_SetPower ADCINC12_Stop ADCINC12_GetSamples ADCINC12_StopAD ADCINC12_fIsDataAvailable ADCINC12_iGetData ADCINC12_ClearFlag Sample Firmware Source Code Configuration Registers Version History